Welcome to the USRP FPGA HDL source code tree! This repository contains free & open-source FPGA HDL for the Universal Software Radio Peripheral (USRP™) SDR platform, created and sold by Ettus Research. A large percentage of the source code is written in Verilog.
This repository contains the FPGA source for the following generations of USRP devices.
Pre-built FPGA and Firmware images are not hosted here. Please visit Firmware and FPGA Images for instructions on downloading and using pre-built images. In most cases, running
will do the right thing.