The standard USRP1 images installer comes with two FPGA images:
By default, the USRP1 uses the FPGA image with 2 DDCs and 2 DUCs. However, a device address parameter can be used to override the FPGA image selection to use an alternate or a custom FPGA image. See the images application notes for installing custom images.
Example device address string representations to specify non-standard firmware and/or FPGA images:
fpga=usrp1_fpga_4rx.rbf -- OR -- fw=usrp1_fw_custom.ihx -- OR -- fpga=usrp1_fpga_4rx.rbf, fw=usrp1_fw_custom.ihx
The USRP1 FPGA does not have the necessary space to support the advanced streaming capabilities that are possible with the newer USRP devices. Some of these features are emulated in software to support the API.
Note: These emulated features rely on the host system's clock for timed operations and therefore may not have sufficient precision for the application.
The USRP device can be modified to accept an external clock reference instead of the 64MHz onboard reference.
The new external clock needs to be a square wave between +7dBm and +15dBm.
After the hardware modification, the user should burn the setting into the EEPROM, so UHD software can initialize with the correct clock rate. Run the following commands to record the setting into the EEPROM:
cd <install-path>/lib/uhd/utils ./usrp_burn_mb_eeprom --args=<optional device args> --values="mcr=<rate>"
The user may override the clock rate specified in the EEPROM by using a device address. Example: