#################################################################################### This is a simple documentation file to keep track of the images in this folder Template: ------------------------------------------------------------------------------------ Git hash: <7-chars hash> Target: Source branch: Date: Description: ------------------------------------------------------------------------------------ File usage instructions: - zr_top_cpld.pof -> JTAG programmer (external programmer) - zr_top_cpld_isp_off.svf -> JTAG-engine (legacy mode) - zr_top_cpld.rpd -> reconfig engine #################################################################################### ------------------------------------------------------------------------------------ Git hash: aab5669 Source branch: titanium-master Date: 15 April 2021 Description: - General Clean-up CPLD Revision = 0x21031009 https://dev.azure.com/ni/DevCentral/_build/results?buildId=858846 ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ Git hash: 53f5b40 Source branch: titanium-master Date: 10 Nov 2020 Description: - split DSA ATR configuration - add git hash to register map CPLD Revision = 0x20110611 https://dev.azure.com/ni/DevCentral/_build/results?buildId=560195 ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ Git hash: 1cbbd36 Source branch: titanium-master Date: 10/26/2020 Description: Initialize DSA memory to safe values CPLD Revision = 0x20102210 https://dev.azure.com/ni/DevCentral/_build/results?buildId=538871 ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ Git hash: 705603e Source branch: zirconium-revb Date: 9/18/2020 Description: This bistream icludes timing constraints changes to match FPGA GPIO interface constrainst available on FPGA version 4.2 CPLD revision: 0x20091513 https://ni.visualstudio.com/DevCentral/_build/results?buildId=493391&view=results ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ Git hash: 0x20090214 (not hash) Source branch: jvalenzu/zbx-reb-pinout Date: 9/6/2020 Description: This bistream icludes timing constraints changes to match FPGA GPIO interface constrainst available on FPGA version 4.1 CPLD revision: 0x20090214 ------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------ Git hash: 0x20082413 (not hash) Source branch: jvalenzu/zr/gpio-retiming Date: 8/27/2020 Description: Initial RevB bringup support image CPLD revision: 0x20082413 ------------------------------------------------------------------------------------