Table of Contents
The UHD will automatically select the USRP B-Series images from the installed images package. The image selection can be overridden with the "fpga" and "fw" device address parameters.
Example device address string representations to specify non-standard images:
fpga=usrp_b100_fpga_firmware.bin -- OR -- fw=usrp_b100_fw_firmware.ihx
The master clock rate of the USRP embedded feeds both the FPGA DSP and the codec chip. Hundreds of rates between 32MHz and 64MHz are available. A few notable rates are:
To use the 61.44MHz clock rate, the USRP embedded will require two jumpers to be moved.
Note: See instructions below to communicate the desired clock rate into the UHD.
To use other clock rates, the jumpers will need to be in the default position.
To communicate the desired clock rate into the UHD, specify the a special device address argument, where the key is "master_clock_rate" and the value is a rate in Hz. Example:
uhd_usrp_probe --args="master_clock_rate=52e6"
The LEDs on the front panel can be useful in debugging hardware and software issues. The LEDs reveal the following about the state of the device:
The following sensors are available; they can be queried through the API.