 |
USRP Hardware Driver and USRP Manual
Version: 003.009.000-0-gcd88f80f
UHD and USRP Manual
|
|
|
USRP Hardware Driver and USRP Manual
Version: 003.009.000-0-gcd88f80f
UHD and USRP Manual
|
|
The following contains interesting notes about each daughterboard. Eventually, this page will be expanded to list out the full properties of each board as well.
The Basic RX and LFRX boards have 4 frontends:
The boards have no tunable elements or programmable gains. Through the magic of aliasing, you can down-convert signals greater than the Nyquist rate of the ADC.
BasicRX Bandwidth:
LFRX Bandwidth:
The Basic TX and LFTX boards have 4 frontends:
The boards have no tunable elements or programmable gains. Through the magic of aliasing, you can up-convert signals greater than the Nyquist rate of the DAC.
BasicTX Bandwidth:
LFTX Bandwidth:
The DBSRX board has 1 quadrature frontend. It defaults to direct conversion but can use a low IF through lo_offset in uhd::tune_request_t.
Receive Antennas: J3
The board has no user selectable antenna setting.
Receive Gains:
Bandwidth: 8 MHz - 66 MHz
Sensors:
The DBSRX2 board has 1 quadrature frontend. It defaults to direct conversion, but can use a low IF through lo_offset in uhd::tune_request_t.
Receive Antennas: J3
The board has no user-selectable antenna setting.
Receive Gains:
Bandwidth (Hz): 8 MHz -80 MHz
Sensors:
The RFX Series boards have 2 quadrature frontends: Transmit and Receive. Transmit defaults to low IF, and Receive defaults to direct conversion. The IF can be adjusted through lo_offset in uhd::tune_request_t.
The RFX Series boards have independent receive and transmit LO's and synthesizers allowing full-duplex operation on different transmit and receive frequencies.
Transmit Antennas: TX/RX
Receive Antennas: TX/RX or RX2
The user may set the receive antenna to be TX/RX or RX2. However, when using an RFX board in full-duplex mode, the receive antenna will always be set to RX2, regardless of the settings.
Receive Gains: PGA0, Range: 0-70dB (except RFX400 range is 0-45dB)
Bandwidth:
Sensors:
The XCVR2450 has 2 quadrature frontends, one transmit, one receive. Transmit and Receive default to direct conversion but can be used in low IF mode through lo_offset in uhd::tune_request_t.
The XCVR2450 has a non-contiguous tuning range consisting of a high band (4.9-6.0 GHz) and a low band (2.4-2.5 GHz).
Transmit Antennas: J1 or J2
Receive Antennas: J1 or J2
The XCVR2450 uses a common LO for both receive and transmit. Even though the API allows the RX and TX LOs to be individually set, a change of one LO setting will be reflected in the other LO setting.
The XCVR2450 does not support full-duplex mode, attempting to operate in full-duplex will result in transmit-only operation.
Transmit Gains:
Receive Gains:
Bandwidths:
Sensors:
Features:
Transmit Antennas: TX/RX
Receive Antennas: TX/RX or RX2
Transmit Gains: PGA0, Range: 0-25dB
Receive Gains: PGA0, Range: 0-31.5dB
Bandwidths:
Sensors:
Features:
Transmit Antennas: TX/RX
Receive Antennas: TX/RX or RX2
Transmit Gains: PGA0, Range: 0-31.5dB
Receive Gains: PGA0, Range: 0-31.5dB
Bandwidths:
Sensors:
LEDs:
Features:
Transmit Antennas: TX/RX
Receive Antennas: TX/RX or RX2
Transmit Gains: PGA0, Range: 0-31.5dB
Receive Gains: PGA0, Range: 0-31.5dB
Bandwidths:
Sensors:
LEDs:
Features:
Transmit Antennas: TX/RX
Receive Antennas: TX/RX or RX2
Transmit Gains: PGA0, Range: 0-31.5dB
Receive Gains: PGA0, Range: 0-31.5dB
Bandwidths:
Sensors:
LEDs:
The TVRX board has 1 real-mode frontend. It is operated at a low IF.
Receive Antennas: RX
Receive Gains:
Bandwidth: 6 MHz
The TVRX2 board has 2 real-mode frontends. It is operated at a low IF.
Receive Frontends:
Note: The TVRX2 has always-on AGC; the software controllable gain is the final gain stage which controls the AGC set-point for output to ADC.
Receive Gains:
Bandwidth: 1.7 MHz, 6 MHz, 7 MHz, 8 MHz, 10 MHz
Sensors:
Please refer to E310 MIMO XCVR board.
Due to different clocking capabilities, the DBSRX will require modifications to operate on a non-USRP1 motherboard. On a USRP1 motherboard, a divided clock is provided from an FPGA pin because the standard daughterboard clock lines cannot provided a divided clock. However, on other USRP motherboards, the divided clock is provided over the standard daughterboard clock lines.
Remove R193 (which is 10 Ohms, 0603 size), and put it on R194, which is empty. This is made somewhat more complicated by the fact that the silkscreen is not clear in that area. R193 is on the back, immediately below the large beige connector, J2. R194 is just below, and to the left of R193. The silkscreen for R193 is ok, but for R194, it is upside down, and partially cut off. If you lose R193**, you can use anything from 0 to 10 Ohms there.
With the daughterboard plugged-in, run the following commands:
cd <install-path>/lib/uhd/utils ./usrp_burn_db_eeprom --id=0x000d --unit=RX --args=<args> --slot=<slot>
Older RFX boards require modifications to use the motherboard oscillator. If this is the case, UHD software will print a warning about the modification. Please follow the modification procedures below:
Move R64 to R84. Move R142 to R153.
Move R35 to R36. Move R117 to R115. These are all 0-Ohm, so if you lose one, just short across the appropriate pads.
With the daughterboard plugged in, run the following commands: :
cd <install-path>/lib/uhd/utils ./usrp_burn_db_eeprom --id=<rx_id> --unit=RX --args=<args> --slot=<slot> ./usrp_burn_db_eeprom --id=<tx_id> --unit=TX --args=<args> --slot=<slot>
<rx_id> choose the appropriate RX ID for your daughterboard<tx_id> choose the appropriate TX ID for your daughterboard<args> are device address arguments (optional if only one USRP device is on your machine)<slot> is the name of the daughterboard slot (optional if the USRP device has only one slot) 
1.8.13