dboard_iface.hpp

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//
// Copyright 2010-2013,2015-2016 Ettus Research LLC
// Copyright 2018 Ettus Research, a National Instruments Company
//
// SPDX-License-Identifier: GPL-3.0-or-later
//

#ifndef INCLUDED_UHD_USRP_DBOARD_IFACE_HPP
#define INCLUDED_UHD_USRP_DBOARD_IFACE_HPP

#include <uhd/config.hpp>
#include <uhd/types/serial.hpp>
#include <uhd/types/time_spec.hpp>
#include <uhd/usrp/fe_connection.hpp>
#include <uhd/usrp/gpio_defs.hpp>
#include <uhd/utils/pimpl.hpp>
#include <stdint.h>
#include <boost/shared_ptr.hpp>
#include <boost/thread/thread.hpp>
#include <string>
#include <vector>

namespace uhd { namespace usrp {

struct UHD_API dboard_iface_special_props_t
{
    bool soft_clock_divider;

    bool mangle_i2c_addrs;
};

class UHD_API dboard_iface : public uhd::i2c_iface
{
public:
    typedef boost::shared_ptr<dboard_iface> sptr;
    typedef dboard_iface_special_props_t special_props_t;

    enum unit_t {
        UNIT_RX   = int('r'),
        UNIT_TX   = int('t'),
        UNIT_BOTH = int('b'),
    };

    enum aux_dac_t {
        AUX_DAC_A = int('a'),
        AUX_DAC_B = int('b'),
        AUX_DAC_C = int('c'),
        AUX_DAC_D = int('d')
    };

    enum aux_adc_t { AUX_ADC_A = int('a'), AUX_ADC_B = int('b') };

    typedef uhd::usrp::gpio_atr::gpio_atr_reg_t atr_reg_t;

    virtual ~dboard_iface(void){};

    virtual special_props_t get_special_props(void) = 0;

    virtual void write_aux_dac(unit_t unit, aux_dac_t which_dac, double value) = 0;

    virtual double read_aux_adc(unit_t unit, aux_adc_t which_adc) = 0;

    virtual void set_pin_ctrl(unit_t unit, uint32_t value, uint32_t mask = 0xffff) = 0;

    virtual uint32_t get_pin_ctrl(unit_t unit) = 0;

    virtual void set_atr_reg(
        unit_t unit, atr_reg_t reg, uint32_t value, uint32_t mask = 0xffff) = 0;

    virtual uint32_t get_atr_reg(unit_t unit, atr_reg_t reg) = 0;

    virtual void set_gpio_ddr(unit_t unit, uint32_t value, uint32_t mask = 0xffff) = 0;

    virtual uint32_t get_gpio_ddr(unit_t unit) = 0;

    virtual void set_gpio_out(unit_t unit, uint32_t value, uint32_t mask = 0xffff) = 0;

    virtual uint32_t get_gpio_out(unit_t unit) = 0;

    virtual uint32_t read_gpio(unit_t unit) = 0;

    virtual void write_spi(
        unit_t unit, const spi_config_t& config, uint32_t data, size_t num_bits) = 0;

    virtual uint32_t read_write_spi(
        unit_t unit, const spi_config_t& config, uint32_t data, size_t num_bits) = 0;

    virtual void set_clock_rate(unit_t unit, double rate) = 0;

    virtual double get_clock_rate(unit_t unit) = 0;

    virtual std::vector<double> get_clock_rates(unit_t unit) = 0;

    virtual void set_clock_enabled(unit_t unit, bool enb) = 0;

    virtual double get_codec_rate(unit_t unit) = 0;

    virtual void set_fe_connection(unit_t unit,
        const std::string& fe_name,
        const uhd::usrp::fe_connection_t& fe_conn) = 0;

    virtual bool has_set_fe_connection(const unit_t)
    {
        return false;
    }

    virtual uhd::time_spec_t get_command_time(void) = 0;

    virtual void set_command_time(const uhd::time_spec_t& t) = 0;

    virtual void sleep(const boost::chrono::nanoseconds& time);
};

}} // namespace uhd::usrp

#endif /* INCLUDED_UHD_USRP_DBOARD_IFACE_HPP */