USRP Hardware Driver and USRP Manual Version: 4.1.0.3
UHD and USRP Manual
siggen_block_control.hpp
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1//
2// Copyright 2020 Ettus Research, a National Instruments Brand
3//
4// SPDX-License-Identifier: GPL-3.0-or-later
5//
6
7#pragma once
8
9#include <uhd/config.hpp>
11#include <uhd/utils/math.hpp>
12#include <complex>
13
14namespace uhd { namespace rfnoc {
15
26
28{
29public:
31
32 static const uint32_t REG_BLOCK_SIZE;
33 static const uint32_t REG_ENABLE_OFFSET;
34 static const uint32_t REG_SPP_OFFSET;
35 static const uint32_t REG_WAVEFORM_OFFSET;
36 static const uint32_t REG_GAIN_OFFSET;
37 static const uint32_t REG_CONSTANT_OFFSET;
38 static const uint32_t REG_PHASE_INC_OFFSET;
39 static const uint32_t REG_CARTESIAN_OFFSET;
40
49 virtual void set_enable(const bool enable, const size_t port) = 0;
50
59 virtual bool get_enable(const size_t port) const = 0;
60
69 virtual void set_waveform(const siggen_waveform type, const size_t port) = 0;
70
78 virtual siggen_waveform get_waveform(const size_t port) const = 0;
79
98 virtual void set_amplitude(const double amplitude, const size_t port) = 0;
99
110 virtual double get_amplitude(const size_t port) const = 0;
111
125 virtual void set_constant(const std::complex<double> constant, const size_t port) = 0;
126
136 virtual std::complex<double> get_constant(const size_t port) const = 0;
137
147 virtual void set_sine_phase_increment(const double phase_inc, const size_t port) = 0;
148
158 virtual double get_sine_phase_increment(const size_t port) const = 0;
159
169 virtual void set_samples_per_packet(const size_t spp, const size_t port) = 0;
170
179 virtual size_t get_samples_per_packet(const size_t port) const = 0;
180
192 const double frequency, const double sample_rate, const size_t port)
193 {
194 if (sample_rate <= 0.0) {
195 throw uhd::value_error("sample_rate must be > 0.0");
196 }
197 const double phase_inc = (frequency / sample_rate) * 2.0 * uhd::math::PI;
198 if (phase_inc < -uhd::math::PI || phase_inc > uhd::math::PI) {
199 throw uhd::value_error("frequency must be in [-samp_rate/2, samp_rate/2]");
200 }
201 set_sine_phase_increment(phase_inc, port);
202 }
203};
204
205}} // namespace uhd::rfnoc
206
Definition: noc_block_base.hpp:42
Definition: siggen_block_control.hpp:28
virtual void set_enable(const bool enable, const size_t port)=0
static const uint32_t REG_BLOCK_SIZE
Definition: siggen_block_control.hpp:32
static const uint32_t REG_PHASE_INC_OFFSET
Definition: siggen_block_control.hpp:38
void set_sine_frequency(const double frequency, const double sample_rate, const size_t port)
Definition: siggen_block_control.hpp:191
virtual size_t get_samples_per_packet(const size_t port) const =0
virtual std::complex< double > get_constant(const size_t port) const =0
virtual void set_amplitude(const double amplitude, const size_t port)=0
static const uint32_t REG_SPP_OFFSET
Definition: siggen_block_control.hpp:34
virtual double get_sine_phase_increment(const size_t port) const =0
static const uint32_t REG_CARTESIAN_OFFSET
Definition: siggen_block_control.hpp:39
static const uint32_t REG_GAIN_OFFSET
Definition: siggen_block_control.hpp:36
static const uint32_t REG_WAVEFORM_OFFSET
Definition: siggen_block_control.hpp:35
virtual double get_amplitude(const size_t port) const =0
virtual siggen_waveform get_waveform(const size_t port) const =0
virtual void set_constant(const std::complex< double > constant, const size_t port)=0
virtual bool get_enable(const size_t port) const =0
virtual void set_samples_per_packet(const size_t spp, const size_t port)=0
virtual void set_sine_phase_increment(const double phase_inc, const size_t port)=0
static const uint32_t REG_ENABLE_OFFSET
Definition: siggen_block_control.hpp:33
RFNOC_DECLARE_BLOCK(siggen_block_control)
static const uint32_t REG_CONSTANT_OFFSET
Definition: siggen_block_control.hpp:37
virtual void set_waveform(const siggen_waveform type, const size_t port)=0
#define UHD_API
Definition: config.h:70
siggen_waveform
Definition: siggen_block_control.hpp:25
Definition: build_info.hpp:12
Definition: exception.hpp:109