USRP Hardware Driver and USRP Manual  Version: 4.4.0.HEAD-0-g5fac246b
UHD and USRP Manual
noc_block_make_args.hpp
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1 //
2 // Copyright 2019 Ettus Research, a National Instruments Brand
3 //
4 // SPDX-License-Identifier: GPL-3.0-or-later
5 //
6 
7 #pragma once
8 
9 #include <uhd/property_tree.hpp>
13 
14 namespace uhd { namespace rfnoc {
15 
16 class clock_iface;
17 class mb_controller;
18 
25 {
26  ~make_args_t();
27 
30 
33 
36 
39 
41  size_t mtu;
42 
45 
48 
50  std::shared_ptr<clock_iface> tb_clk_iface;
51 
53  std::shared_ptr<clock_iface> ctrlport_clk_iface;
54 
56  //
57  // Note that this may not be populated -- most blocks do not gain access to
58  // the motherboard controller.
59  std::shared_ptr<mb_controller> mb_control;
60 
63 
66 };
67 
68 }} /* namespace uhd::rfnoc */
register_iface.hpp
uhd::rfnoc::block_id_t
Definition: block_id.hpp:39
uhd::rfnoc::noc_block_base::make_args_t::reg_iface
register_iface::sptr reg_iface
Register interface to this block's register space.
Definition: noc_block_make_args.hpp:47
property_tree.hpp
uhd::rfnoc::noc_block_base::make_args_t::mb_control
std::shared_ptr< mb_controller > mb_control
Reference to the motherboard controller associated with this block.
Definition: noc_block_make_args.hpp:59
uhd::rfnoc::noc_block_base::make_args_t::ctrlport_clk_iface
std::shared_ptr< clock_iface > ctrlport_clk_iface
Controlport clock interface object that is shared with the reg_iface.
Definition: noc_block_make_args.hpp:53
uhd::rfnoc::noc_block_base::make_args_t
Definition: noc_block_make_args.hpp:24
uhd::rfnoc::noc_block_base::make_args_t::num_input_ports
size_t num_input_ports
Number of input ports (gets reported from the FPGA)
Definition: noc_block_make_args.hpp:35
uhd::rfnoc::noc_block_base::make_args_t::noc_id
noc_id_t noc_id
Noc-ID.
Definition: noc_block_make_args.hpp:29
uhd::property_tree::sptr
std::shared_ptr< property_tree > sptr
Definition: property_tree.hpp:222
uhd::rfnoc::noc_block_base::make_args_t::tree
uhd::property_tree::sptr tree
The subtree for this block.
Definition: noc_block_make_args.hpp:62
uhd::device_addr_t
Definition: device_addr.hpp:37
uhd
Definition: build_info.hpp:12
uhd::rfnoc::noc_block_base::make_args_t::~make_args_t
~make_args_t()
rfnoc_types.hpp
noc_block_base.hpp
uhd::rfnoc::noc_block_base::make_args_t::chdr_w
chdr_w_t chdr_w
CHDR width of this block.
Definition: noc_block_make_args.hpp:44
uhd::rfnoc::register_iface::sptr
std::shared_ptr< register_iface > sptr
Definition: register_iface.hpp:30
uhd::rfnoc::noc_block_base::make_args_t::args
uhd::device_addr_t args
Additional args that can be parsed and used by this block.
Definition: noc_block_make_args.hpp:65
uhd::rfnoc::noc_block_base::make_args_t::mtu
size_t mtu
Value of the MTU register, converted to bytes.
Definition: noc_block_make_args.hpp:41
uhd::rfnoc::noc_id_t
uint32_t noc_id_t
Definition: defaults.hpp:50
uhd::rfnoc::noc_block_base::make_args_t::tb_clk_iface
std::shared_ptr< clock_iface > tb_clk_iface
Timebase clock interface object that is shared with the reg_iface.
Definition: noc_block_make_args.hpp:50
uhd::rfnoc::noc_block_base::make_args_t::num_output_ports
size_t num_output_ports
Number of output ports (gets reported from the FPGA)
Definition: noc_block_make_args.hpp:38
uhd::rfnoc::chdr_w_t
chdr_w_t
Type that indicates the CHDR Width in bits.
Definition: rfnoc_types.hpp:19
uhd::rfnoc::noc_block_base::make_args_t::block_id
block_id_t block_id
Block ID (e.g. 0/Radio#0)
Definition: noc_block_make_args.hpp:32