sink_block_ctrl_base.hpp

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//
// Copyright 2014 Ettus Research LLC
// Copyright 2018 Ettus Research, a National Instruments Company
//
// SPDX-License-Identifier: GPL-3.0-or-later
//

#ifndef INCLUDED_LIBUHD_TX_BLOCK_CTRL_BASE_HPP
#define INCLUDED_LIBUHD_TX_BLOCK_CTRL_BASE_HPP

#include <uhd/rfnoc/block_ctrl_base.hpp>
#include <uhd/rfnoc/sink_node_ctrl.hpp>

namespace uhd { namespace rfnoc {

class UHD_RFNOC_API sink_block_ctrl_base;
class sink_block_ctrl_base : virtual public block_ctrl_base, virtual public sink_node_ctrl
{
public:
    typedef boost::shared_ptr<sink_block_ctrl_base> sptr;

    /***********************************************************************
     * Stream signatures
     **********************************************************************/
    stream_sig_t get_input_signature(size_t block_port = 0) const;

    std::vector<size_t> get_input_ports() const;

    /***********************************************************************
     * FPGA Configuration
     **********************************************************************/
    size_t get_fifo_size(size_t block_port = 0) const;

    size_t get_mtu(size_t block_port = 0) const;

    virtual void configure_flow_control_in(
        const size_t bytes, const size_t block_port = 0);

    virtual void set_error_policy(const std::string& policy);

protected:
    /***********************************************************************
     * Hooks
     **********************************************************************/
    virtual size_t _request_input_port(
        const size_t suggested_port, const uhd::device_addr_t& args) const;

}; /* class sink_block_ctrl_base */

}} /* namespace uhd::rfnoc */

#endif /* INCLUDED_LIBUHD_TX_BLOCK_CTRL_BASE_HPP */