USRP Hardware Driver and USRP Manual  Version: 3.14.0.0.rc1-19-ga56185c6f
UHD and USRP Manual
Class List
Here are the classes, structs, unions and interfaces with brief descriptions:
[detail level 123456]
 Ncommon
 Nmagnesium
 Npython
 Nuhd
 C_uhd_static_fixtureHelper for static block, constructor calls function
 Cadf435x_iface
 Cadf435x_impl
 Cadf535x_iface
 Cadf535x_impl
 Cb100_clock_ctrl
 Cb100_codec_ctrl
 Cb100_implImplementation guts
 Cb200_iface
 Cb200_implImplementation guts
 Cb200_local_spi_core
 Cb200_ref_pll_ctrl
 Cb200_uart
 Cbase64_decodestate
 Cdma_fifo_core_3000
 Ce300_fifo_config_t
 Ce300_fifo_interface
 Ceth_addr
 Cfifo_ctrl_excelsior
 Cfifo_ctrl_excelsior_config
 Cfw_comm_pkt_t
 Cgpio_core_200
 Cgpio_core_200_32woSimple wrapper for 32 bit write only
 Cgpsdo_cache_state_t
 Ci2c_core_100_wb32
 Ci2c_core_200
 Citem32_sc12_3x
 Clmx2592_iface
 Cmagnesium_ad9371_iface
 Cmagnesium_cpld_ctrlControls the CPLD on a Magnesium daughterboard
 Cmax2870
 Cmax2871
 Cmax287x
 Cmax287x_iface
 Cn230_eeprom_map_t
 Cn230_eth_eeprom_map_t
 Cn230_flash_prog_t
 Cn230_host_shared_mem_data_t
 Cn230_host_shared_mem_t
 Coctoclock_fw_eeprom_t
 Coctoclock_impl
 Coctoclock_packet_t
 Coctoclock_state_t
 Cradio_ctrl_core_3000
 Crhodium_cpld_ctrlControls the CPLD on a Rhodium daughterboard
 Crx_dsp_core_200
 Crx_dsp_core_3000
 Crx_frontend_core_200
 Crx_frontend_core_3000
 Crx_vita_core_3000
 Csbx_xcvr
 Cscoped_gil_releaseRAII-style GIL release method
 Cspi_core_3000
 Ctime64_core_200
 Ctime_core_3000
 Ctx_dsp_core_200
 Ctx_dsp_core_3000
 Ctx_frontend_core_200
 Ctx_vita_core_3000
 Cuhd_dpdk_arp_entry
 Cuhd_dpdk_config_req
 Cuhd_dpdk_ctx
 Cuhd_dpdk_ipv4_5tuple
 Cuhd_dpdk_port
 Cuhd_dpdk_rx_entry
 Cuhd_dpdk_sockarg_udp
 Cuhd_dpdk_socket
 Cuhd_dpdk_thread
 Cuhd_dpdk_tx_queue
 Cuhd_dpdk_udp_priv
 Cuhd_dpdk_wait_req
 Cuhd_range_tRange of floating-point values
 Cuhd_stream_args_tA struct of parameters to construct a stream
 Cuhd_stream_cmd_tDefine how device streams to host
 Cuhd_subdev_spec_pair_tSubdevice specification
 Cuhd_tune_request_tInstructs implementation how to tune the RF chain
 Cuhd_tune_result_tStores RF and DSP tuned frequencies
 Cuhd_usrp_register_info_tRegister info
 Cuhd_usrp_rx_info_tUSRP RX info
 Cuhd_usrp_tx_info_tUSRP TX info
 Cuser_settings_core_200
 Cuser_settings_core_3000
 Cusrp1_codec_ctrl
 Cusrp1_iface
 Cusrp1_impl
 Cusrp2_clk_regs_t
 Cusrp2_clock_ctrl
 Cusrp2_codec_ctrl
 Cusrp2_ctrl_data_t
 Cusrp2_fifo_ctrl
 Cusrp2_iface
 Cusrp2_impl
 Cusrp2_stream_ctrl_t
 Cx300_adc_ctrl
 Cx300_clock_ctrl
 Cx300_dac_ctrl
 Cx300_dboard_iface
 Cx300_dboard_iface_config_t
 Cx300_eeprom_map_t
 Cx300_eth_conn_t
 Cx300_fpga_prog_flags_t
 Cx300_fpga_prog_t
 Cx300_fpga_read_t
 Cx300_fw_comms_t
 Cx300_impl
 Cx300_mb_eeprom_iface
 Cx300_mtu_t